LSI 3D-CG

Interconnect structure of 65nm technology
(10 metal layers)
光源を変えてみるテスト

Interconnect structure of 65nm technology
(10 metal layers)

65nm inverter
self-luminance のテスト

65nm inverter
self-luminance のテスト

65nm inverter
self-luminance のテスト

65nm inverter
self-luminance のテスト

Interconnect structure of 65nm technology

Interconnect structure of 65nm technology
(10 metal layers)
切断面を動かすアニメーションの実験
[Download .skp file]

Interconnect structure of 65nm technology
(10 metal layers)
レンダリング後に Gimp で字を入れてみる

Interconnect structure of 65nm technology
(10 metal layers)
[Download .skp file]

Interconnect structure of 65nm technology
(10 metal layers)
[Download .skp file]

65nm Inverter
[Download .skp file]

Inverter scaling from 1.2um to 22nm
[Download .skp file]

Inverter scaling from 1.2um to 22nm

Interconnect structure of 65nm technology
(10 metal layers)

Interconnect structure of 65nm technology
(10 metal layers)

Test structure for
transistor RF characteristics

Test structure for
transistor RF characteristics

Test structure for
transistor DC characteristics

Test structure for
transistor DC characteristics

Test structure for
transistor DC characteristics

Test structure for
transistor DC characteristics

D-flipflop (a 180nm CMOS process)

D-flipflop (a 180nm CMOS process)

Spiral inductor

RF pad